6. System Simulations With a well-correlated and stable system model, the overall system simulation can be done. The system simulation takes into account other variables such as: - Size of the channels in the chassis Number of potential cards
- Shortest distance over the backplane from card-to-card
- Longest distance over the backplane from card-to-card
6.系统仿真 用一个好相关性的稳定的系统模型,整个系统的仿真就可以做了。 系统仿真要考虑到其它的变量,比如: - 底盘上的信道尺寸(size of the channels in the chassis), 可能用道德板卡的数量
- 整个背板上从板卡到板卡的最短距离
- 整个背板上从板卡到板卡的最长距离
Using this information, the system simulator can interpolate the electrical characteristics for all other points in the chassis. For example, if the electrical characteristics between two points are measured, with the shortest distance being two inches and the longest distance being 10 inches, the system simulator can be used to calculate the electrical characteristics for all other points in between, provided a good system model has been built. 用这些信息,系统仿真器就能更改底盘上的其它点的电性能。比如,已知最短距离是2英寸和最长距离是10英寸,如果测量到了两点之间的电性能,系统仿真器就可以用来计算这个区域内所有其它的电,当然这是在好的系统模型已经建立好了的情况下。 Wrap Up 总结 The backplane is a complex system containing a number of variables that can impact signal integrity. The overall number of variables to be managed and the negative impact they have on signal quality increases with speed. At speeds over 3 Gbps, not only are the negative impact of existing variables increased, but new variables such as skin effect, dielectric loss, ISI, and via stub effect, must be taken into account.
背板是一个复杂的系统。它包括了一定数量的影响到信号完整性的变量。总的要管理的和对信号质量有负面影响的变量数量随着速率的增加而增加。在3 Gbps以上,不单止目前存在的变量的负面影响再增加, 新的变量比如表皮效应,介电损耗,ISI(信号的码间干扰),和导通孔(多余的)尾端效应,一定要考虑进来。 The addition of physical components within a given point-to-point link also causes signal degradation. These include PCB traces, connectors, via stubs, and the actual silicon devices themselves. Each time another impairment is factored in, signal quality is reduced at high frequencies. 在一个给定的点到点的连接中,额外的物理元件也会导致信号的衰减。这些包括PCB线路,连接器,导通孔(多余的)尾端,和实际的硅装置本身。每次其它的损害被确认为信号质量的完整。 To overcome these challenges, system vendors must develop accurate and well-correlated models for both the active and the passive components of the system. Silicon vendors need quality channel models to successfully design proper on-chip circuits for implementing various techniques like equalization and reflection cancellation. By modeling all the known deterministic effects of the channel, signal-integrity related problems can be well understood and minimized. 为了克服这些挑战,系统供应商一定要开发精确的和关联很好的模型,不管是系统上的主动元件或者是被动元件。硅芯片供应商需要高质量的信道模型来成芯片级的设计,从而来用不同的技术,比如均等化和反射消除。通过将所有已知的有确定原因的信道因素模块化,和信号完整性相关的难题就能被很好的理解和最少化。
[此贴子已经被作者于2009-2-25 13:49:03编辑过] |