[求助]protel99se最近发现的问题，一个有网络的过孔没有和它相关的网络连接，DRC居

fenqinyao

protel99se最近发现的问题，一个有网络的过孔没有和它相关的网络连接，DRC居然不报错，有好几年没有用protel了，最近用它做了几个板子，在这一块板子上出现了这个问题，但以前一直都没有发现这个问题，不知是我软件装的有问题材还是设置有问题，不知各位有没有遇到过。

图片如下：

fenqinyao

现在将这个文件放上来，哪个有心人帮忙测试一下，刚才重新了软件还是不行，明天到公司去装上试试吧，看来一时半会是没有发言了。

tongchengde

Protel Design System Design Rule Check
PCB File : Documents\PCB1.PCB
Date     : 28-Aug-2009
Time     : 14:27:30

Processing Rule : Hole Size Constraint (Min=1mil) (Max=100mil) (On the board )
Rule Violations :0

Processing Rule : Width Constraint (Min=10mil) (Max=10mil) (Prefered=10mil) (On the board )
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=10mil) (On the board ),(On the board )
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (On the board ) )
   Violation         Net 01   is broken into 2 sub-nets. Routed To 85.71%
     Subnet : C2-1     C2-2     C1-1     C1-2     C3-1     C3-2     C4-2    
     Subnet : C4-1    
Rule Violations :1

Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )
Rule Violations :0

Violations Detected : 1
Time Elapsed        : 00:00:00

hao0502

Protel Design System Design Rule Check
PCB File : Documents\PCB1.PCB
Date     : 29-Aug-2009
Time     : 12:08:30

Processing Rule : Hole Size Constraint (Min=1mil) (Max=100mil) (On the board )
Rule Violations :0

Processing Rule : Width Constraint (Min=10mil) (Max=10mil) (Prefered=10mil) (On the board )
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=10mil) (On the board ),(On the board )
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (On the board ) )
   Violation         Net 01   is broken into 2 sub-nets. Routed To 85.71%
     Subnet : C2-1     C2-2     C1-1     C1-2     C3-1     C3-2     C4-2
     Subnet : C4-1
Rule Violations :1

Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )
Rule Violations :0

Violations Detected : 1
Time Elapsed        : 00:00:00

maffia

看来是您的软件问题了。。。

fenqinyao

第一个图检查不出来，第二个图是可以检查出来的，我又试了一下，如要你的设计中所有元件的焊盘都己经走通了的话，它就检查不出来，过孔和线都检查不出来，我放上来的文件是删了一根线的，如果你将删掉的那线连起来就是我放上去的那个状态，这是protel软件的问题了，我用公司的电脑是同样的结果，这可能是protel的一个BUG吧！