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Spartan-6开发板(XC6SLX45T)

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pcb-si.com 该用户已被删除
发表于 2010-12-21 10:17:39 | 显示全部楼层 |阅读模式
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发表于 2010-12-21 10:26:26 | 显示全部楼层
不错,非常感谢
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发表于 2010-12-21 10:52:28 | 显示全部楼层
看不出来什么,水平有限
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发表于 2010-12-21 20:39:45 | 显示全部楼层
Spartan-6 FPGA Connectivity Kit - Promotional Discount
http://www.xilinx.com/products/devkits/DK-S6-CONN-G-XP1.htm
是这个吧


The Spartan®-6 FPGA Connectivity kit is a complete, easy-to-use Connectivity Development and Demonstration platform for designing with standards based protocols – PCIe®, Ethernet, implementing low-cost protocol bridging, providing higher efficiency alternative to LVDS communication, etc in multiple market segments.

Provided with each Spartan-6 FPGA Connectivity Kit is a FULL seat of Production Netlist of Northwest Logic Packet DMA IP Core for implementing high speed and maintaining efficient data transfer on the PCIe link. This DMA IP Core can be targeted to any Xilinx Spartan-6 FPGA.

The Spartan-6 FPGA Connectivity Kit delivers a fully tested and supported Connectivity Targeted Reference Design that integrates built-in blocks for PCI Express and Memory Controller, soft IP for Gigabit Ethernet and the DMA IP core from Northwest Logic. The Targeted Reference Design is a framework that delivers – hardware design / RTL source Files, simulation environment, implementation scripts and design flows, software device drivers, an application and a GUI.

In addition, also included with each Spartan-6 FPGA Connectivity Kit is a full-seat of Xilinx ISE® Design Suite: Embedded Edition device locked to the Spartan-6 LX45T device.

For Japan Customers Only,
please order number: DK-S6-CONN-G-J-XP1
through your local Japan distributor.
What's Included

    * ROHS compliant SP605 Base Board including the XC6SLX45T-FGG484 -3CES FPGA
    * ISE Design Suite: Embedded Edition (Device-locked to the Spartan-6 LX45T FPGA)
    * Documentation
          o Spartan-6 FPGA Connectivity Kit Hardware Setup Guide.
          o Spartan-6 FPGA Connectivity Kit Getting Started.
          o Spartan-6 FPGA Targeted Reference Design User Guide.
          o Example Designs User Guide.
          o Schematics and PCB files
    * Cables & Adapter
          o Universal 12V power supply
          o Two USB cables – enabling BIST and device configuration
          o One Ethernet cable – host communication to the base reference design interface
          o Four SMA cables
          o One DVI-VGA adapter – standard interface for video display
    * Connectivity Targeted Reference Design (TRD) and Demonstration
          o Design includes support for PCI Express (x1 Gen1), DMA, Virtual FIFO Memory controller supporting DDR3 interface, and Gigabit Ethernet (GMII and SFP interfaces)
          o TRD Design Files including top-level RTL / Source files
          o TRD ISE Project files, Simulation and Implementation Environment
          o DMA Design – Northwest Logic PCIe Packet DMA (Full production version and Simulation Model)
          o TRD Interface Software – Linux Device Drivers, Application, Demonstration
    * Examples Designs and Demonstrations
          o Board Diagnostic Demo
          o ChipScope Pro Serial IO Toolkit IBERT Transceiver Test Design
    * USB Flash Drive
          o All reference designs including TRD files, demos, and documents are delivered on a USB stick.
    * Fedora 10 Live CD - Linux Operating System

Key Features

    * FPGA: XC6SLX45T FGG484-3CES Spartan-6 Configuration:
    * Serial Connectivity:
          o PCI Express x1 Edge Connector
          o SFP transceiver connector (SFP module not included)
          o SMA: 1 SMA port (Tx & Rx) for off-board GTP transceiver connectivity
    * Parallel Connectivity
          o 10/100/1000 Tri-Speed Ethernet
    * Memory:
          o DDR3 Component Memory 1Gb
          o 16MB Parallel (BPI) Flash (Also available for configuration)
          o IIC 8Kb IIC EEPROM
    * Additional Connectivity:
          o FMC-LPC connector (1 GTP Transceiver, 68 single-ended or 34 differential user defined signals)
          o User GPIO with two SMA connectors
          o 4 User I/O (Digilent 2x6 Header)
    * Device Configuration
          o Onboard JTAG configuration circuitry
          o 128MB Platform Flash XL
          o Quad SPI Flash 64MB
          o 16MB Parallel (BPI) Flash
          o System ACE 2G Compact FLASH (CF) Card
          o JTAG
    * Clocking:
          o 200 MHz Oscillator (Differential)
          o Oscillator socket (Single-Ended)
          o SMA Connectors for external clock (Differential)
          o Transceiver (GTP) Reference Clock port with 2 SMA connectors
    * Display & Control:
          o Video - DVI / VGA
          o 16x2 LCD displays, LEDs
          o 2X Push Buttons, 4X DIP Switches
    * Power 12V wall adapter or ATX
    * Voltage and current measurement capability of 2.5V, 1.5V, and 1.2V, 1.0V supplies

For further information please open a Webcase.

Xilinx offers a 90-day limited warranty on this product. See Limited Warranty for detailed information.
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发表于 2010-12-21 21:19:21 | 显示全部楼层
用什么画的?
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发表于 2010-12-24 13:17:17 | 显示全部楼层
下载学习
谢谢楼主分享
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发表于 2010-12-27 22:22:47 | 显示全部楼层
哪位高手指点一下,怎么打开啊
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发表于 2010-12-30 12:01:28 | 显示全部楼层
看上去很牛!
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wang_pn 该用户已被删除
发表于 2010-12-30 14:23:11 | 显示全部楼层
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发表于 2011-1-6 09:12:53 | 显示全部楼层
下载学习一下
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